



Hardware/Software Co-design Fundamentals with Practical Implementation on ZYNQ ARM/FPGA SoC - Round 1
EGP 2000.00
By Mervat Mahmoud
- mervat-m@eri.sci.eg
Starts on 30-Jan-2025
Category: Digital Electronics
Level: Intermediate
Description
- Introduction to System on Chip (SoC) - Exploring PS and PL Cores - AMBA protocols and debugging with Vivado using ILA core - AXI-Stream FIR Filter Software/Hardware Co-design Project
Prerequisites
Knowledge of HDL Language (Verilog or VHDL).Knowledge of Python language is preferred.